The present invention relates to the field of automatic test equipment for testing electronic video devices, and, particularly, to automatic test equipment for generating complex, multiple format video signals and the real time capture and analysis of complex video signals.
The present invention also relates to methods for producing a static video signal and methods for drawing an image on a screen, which may be used in conjunction with automatic test equipment for testing electronic video devices.
Automatic test equipment for testing standard format video devices is known. However, it is commonly required to evaluate the performance and functionality of a non-standard video unit under test (UUT) to determine if the UUT is operating within the manufacture""s specifications. Specifically, the UUT may require special image and scan formats, voltage levels, and timing signals. In addition, fault simulation may be required to verify the UUT""s functionality.
Video signals can be generated by a wide variety of instruments employing diverse methods. In most available types, the image format, sync format and timing are limited to a set of known types primarily to support commercial display devices. Also, any UUT specific timing signals, related to the video signal but not part of it, often must be created by the use of ancillary equipment.
It is an object of the present invention to provide new and improved automatic test equipment for testing electronic video devices.
It is another object of the present invention to provide new and improved automatic test equipment for generating complex, multiple format video signals and the real time capture and analysis of complex video signals.
It is another object of the present invention to provide new and improved methods for producing a static video signal for use in the testing of electronic video devices.
It is yet another object of the present invention to provide new and improved methods for drawing an image on a screen for use in the testing of electronic video devices.
In order to achieve these objects and others, in accordance with the invention, a Video Asset (AVA) is disclosed and is a VXI register based, single xe2x80x9cCxe2x80x9d size, instrument intended for use in automatic test equipment. The AVA consists of seven major elements as follows:
1. Primary Composite Video (PCV);
2. Stroke Generator (SG);
3. Secondary Video Source (SVS);
4. Real Time Capture (RTC);
5. Serial Data Interface (SDI);
6. Distributed Time Base (DTB);
7. VXI Interface; and
8. Software Calculation and Control Module (SCCM).
Thus, in a method for producing a static video signal in accordance with the invention, e.g., for delivery to a unit under test, a prime image memory (PIM) holding a main bit mapped image is provided, sync and blanking patterns for lines of the video signal being generated are held in a composite sync memory (C-Sync), and a series of arbitrary bit line patterns defined in a test program are held in two user specified pulse memories (USPs). Data blocks are arranged in a circular queue in a line parameter memory (LPM), each data block corresponding to a complete video line and containing pointers to specific entries in the PIM, the C-Sync and the USPs and a flag indicative of scan direction. Production of the video signal is initiated by reading the LPM and extracting the pointers from the data blocks for a first line of the video signal being produced. Bits from the PIM, C-Sync and USPs are obtained based on the extracted pointers and combined to thereby form the video signal. The length of the first line of video signal being produced is monitored to determine when the first line of video is complete, and then production of the video signal is continued by reading the LPM to extract the pointers from the data blocks for additional lines of the video signal being produced, obtaining bits from the PIM, C-Sync and USPs based on the extracted pointers and monitoring the length of the additional lines to determine when each additional line of video is complete.
The formation of the video signal can be controlled by regulating the transfer of the combined video data in order to provide uninterrupted video output, for example, by providing a first-in-first-out (FIFO) memory for receiving the combined bits, storing the combined bits in the FIFO memory for a period of time until the FIFO memory is almost full, then removing the stored combined bits from the FIFO memory such that the FIFO memory is almost empty, and repeating the storing and removing steps.
In some embodiments, a stored dynamic image is overlaid onto the static video signal being produced. This may be achieved by providing a vector store memory (VSM) with entries each holding a line offset, pixel offset, overlay image pointer and priority for the dynamic image, reading each entry in the VSM and comparing the overlay line offset to a pending line of the primary image, and selectively activating the overlay image based on the relation between the overlay line offset and the pending line of primary image.
A deflection waveform may be imposed on the lines of video produced to thereby form a raster video signal, e.g., from a multi-format deflection waveform generator. In this case, data blocks are held in a scan memory including sine and cosine of angle and magnitude data, and the application of the data blocks is controlled to thereby enable either modulated raster video signal or a non-modulated raster video signal to be produced. If the data blocks of sine and cosine of the angle are applied, a modulated raster video signal is produced. If the data blocks of magnitude data are applied, a non-modulated raster video signal is produced.
In a method for drawing an image on a screen, three streams of data are created by directing a preload value to a counter having memory addresses and using the memory addresses to obtained data from the memory, each stream of data is converted to an analog signal by means of a respective digital to analog converter, and the analog signals are directed to output channels. The three streams of data preferably represent X-deflection data, Y-deflection data and Z-intensity data. Also, a fourth stream of data may be created by the value being directed to the counter, in which case, the addresses being provided by the counter to the memory are controlled based on the fourth stream of data.
In preferred embodiments, the image is a pattern and the value is determinative of the pattern. The pattern being drawn can be varied by changing the value being directed to the counter. The duration for which each of the values is directed to the counter may also be varied and any variations controlled to thereby enable the creation of different pattern sequences.
The invention will be described in detail with reference to some preferred embodiments of the invention illustrated in the figures in the accompanying drawing. However, the invention is not confined to the illustrated embodiments alone.